|
|
| Offered by:
Department of Applied Electronics
(IAE) |
| Prerequisite: 92013 |
| Recommended semester:
4th or 5th semester |
| Scope and form: Project work. |
| Examination:
Written exam
(13 point scale
) |
| Contact person: |
Birgitte Yde, IAE, Building 451, Tel. +45 4525 5252 |
|
Aim: The aim of the course is to enable the student to
* Design an electronic system using hybrid thickfilm.
* Identify the parasitic components in designed circuits and estimate the size of the parasitic components.
* Get an overview on the currently used packaging and interconnection technologies. |
Contents: Thick Film technology (high temperature as well as polymer). Electrical properties of circuits (resistance, capacity, inductance of wires in the circuit).
Design of transmission lines. E-MC considerations for circuits.
Interconnection technologies (Flip Chip, Ball Grid Array, Wirebonding).
Packaging technology (Hermetical non hermitical).
Protection of the circuit in relation to the environment (Glob Top).
Thermal considerations, Die Bonding, Chip On Board.
Thinfilm.
ASIC's. |
